epd systems engineering technical bulletin jtag boundary scan initialization on the amd 29k family the am29030? and am29035? microprocessors and the am29200?, am29240?, am29245? and am29243? microcontrollers incorporate a five-pin joint test action group (jtag) boundary scan interface and test access port that provides a scan interface to testing and debug features of the processor core. improper initialization of the jtag interface can cause intermittent and unpredictable behavior. this bulletin describes design requirements for proper initialization of the interface on the 29k family of products, and supersedes the technical bulletin with pid#18010a. the test access (jtag) port can access, affect and sample the processor inputs and outputs because a boundary scan register is incorporated into the design of the input and output cells. for correct processor initialization in all cases, the trst signal must be asserted in conjunction with the reset input, whether or not the jtag port is used. what follows is a recommended method for insuring that this occurs. tie trst , the test reset input, to system reset so that the jtag logic is initialized at power-on. if the jtag port is not to be used, drive tck , tms and tdi to known states, preferably through pull-up resistors. although these signals have weak internal active pull-ups, tying them to a known signal level will eliminate any system noise from being coupled into the jtag interface. for further information, contact the epd technical support hotline: us: 1-800-2929-amd europe: 44-(0) 256-811101 japan: 0031-11-1163 29k, am29200, am29030, am29035, am29240, am29245 and am29243 are all trademarks of advanced micro devices, inc. page 1 of 1 pid# 18010b
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